I. Field of the Invention
This invention relates to a process of manufacturing a semiconductor device, and more particularly, this invention relates to a process of manufacturing a semiconductor device in which a through hole such as a so-called contact hole is formed in a layer on a semiconductor substrate.
II. Description of the Prior Art
In a conventional semiconductor device, a layer or a film such as a silicon dioxide layer, borosilicate glass layer and phosphosilicate glass layer is usually formed on the semiconductor substrate for the purpose of insulation and/or passivation of the device. In the layer on the semiconductor substrate, a through hole such as a so-called contact hole is usually formed. After the through hole is formed, a further layer such as an aluminum wiring layer is deposited on the structure. As shown in FIG. 1, if the through hole 10 formed in a layer 12 on a semiconductor substrate 14 has a sharp opening edge 16, the additional layer 18 formed on the layer 12 and in the through hole 10 tends to be cut. As a result, a short circuit or other malfunctions tend to occur. Thus, it is preferable that the through hole 10 have an obtuse opening edge 20 as shown in FIG. 2.
A conventional semiconductor device such as a bipolar transistor usually has a multilayer structure consisting of, from the bottom layer, a silicon dioxide layer, a hybrid layer of borosilicate glass (BSG) and undoped silicon dioxide, and a phosphosilicate glass (PSG) layer on the semicondcutor substrate. A through hole is formed in the multilayer structure by a selective wet etching using a hydrofluoric acid-based etching solution. The etching rate of the PSG layer (the top layer) is faster than the hybrid layer and silicon dioxide layer under the PSG layer. As a result, an obtuse opening edge is obtained since the sharp opening edge is etched off while the lower layers are etched.
However, PSG has drawbacks in that it corrodes the aluminum wiring, and the phosphorus in the PSG uncontrollably migrates into the semiconductor substrate to change the electric characteristics of the device. Further, with the high integration of the device, in lieu of the thermal diffusion from PSG or BSG, an ion implantation technique which has higher controllability comes to be used to form impurity region in the semicondcutor substrate. Thus, the PSG layer and BSG layer are usually not formed in the up-to-date LSI. In addition, chemical dry etching technique using CF.sub.4 and O.sub.2 gas has come to be used in lieu of the wet etching technique since the former has a high controllability. The etching rate of PSG by chemical dry etching is about the same as that of BSG or a silicon dioxide layer. In summary, a through hole with an obtuse opening edge is not obtained in an up-to-date semiconductor device since PSG and BSG are not used and since chemical dry ething is used instead of wet etching. The need continues to exist to form a through hole with an obtuse opening edge in an up-to-date semiconductor device in which no PSG layer is used and/or to form the same using the chemical dry etching technique.